The ARM and Thumb instruction sets can be broadly classified into the following functional groups.
1. Branching and Control Instructions: Instructions like subroutine calls, looping and changing the state between ARM and Thumb fall under this category of instructions.
2. Register Load and Store instructions: Loading the values of single registers to and from the memory are covered under this type of instructions. The values may be 32 bit word, a 16-bit half word or an 8 bit unsigned value.
3. Multiple Register Load and Store Instructions: Facilitate the to and fro movement between the contents of the multiple registers, used in block operations and stack operations.
4. Data Processing Instructions: Operations like addition, subtraction or bitwise logic on the contents of the registers are performed by this type of instructions.
5. Status Register access Instructions: These instructions primarily move the contents between the status registers and the GPRs.
6. Coprocessor Instructions: These provide a general framework to extend the ARM architectures.
Anyone with a prior knowledge of basic microprocessor architectures will recognize the striking resemblance between the various classifications and also the instruction set. However there are a few features which cannot be customized by the user himself in ARMs and the job is left to the compiler itself. With the evolution of the Cortex machines, the processors have been now divided into 3 profiles based on the type of application they handle:
1. Application profile: These are application specific processors like the Cortex-A8 which feature Memory management support (MMU) and high performance at low power.
2. Real-time profile: Made for real time processors like the Cortex-R4 which has a protected memory (MPU), and low latencies required for real time applications.
3. Microcontroller profile: These devices are meant for mobile devices like the Cortex-M3. Predictable behavior is the main priority with low gate count and finds use in embedded specific applications.
Starting with the old ARMs working at slow cycle speeds, the machines have eventually evolved into high performance machines offering better battery performance and less power consumption. A brief chart of a few architecture families is shown below.
The ARM9 worked on 130-220 MHz clocks typically, which grew to 225-333MHz in ARM10, 412 MHz in ARM11, 600MHz in ARM Cortex A8 and to 1 GHz in the ARM Cortex A9 line of architectures. Each generational leap is marked with drastic performance improvements just like a generational jump in Pentium machines.