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How to Interface Serial EEPROM 24C02 with 8051 microcontroller (AT89C51)


Developed By: 
Himanshu Choudhary

EEPROM stands for electrically erasable programmable read only memory. It is a secondary storage device that once written (programmed) can hold data even when the power is removed. The EEPROM is a class of read only memory that can be electrically erased and reprogrammed.

AT24C02 is a two wire 2Kbits serial EEPROM by Atmel. The memory is organized in 256 words of single byte each arranged in 32 pages of 8 bytes each. The addressing of memory locations requires eight bit addresses.

AT24C02 is two-wire serially programmable i.e., for programming, the data and control signals are provided serially along with clock signals from the other wire. The read-write operations are accomplished by sending a set of control signals including the address and/or data bits. The control signals must be accompanied with proper clock signals.
The AT24C02 has hard wire addressing of 3 bit length. This facilitates interfacing of a maximum of eight (23) 24C02 devices to a system thereby, incorporating a maximum 16Kbits memory. Multiple 24C02 devices can be connected to a microcontroller/microprocessor based system using I2C interface.
The project demonstrates interfacing of a single 24C02 IC with AT89C51 (8051) microcontroller. The microcontroller is programmed to perform write operation of a single byte and read the same. The byte written and read is displayed on a LCD display.


How to Interface Serial EEPROM 24C02 with 8051 microcontroller (AT89C51)



Of the two wire serial EEPROMs from ATMEL, 24C02 is one of them and comes in different packages. No matter what the package type, following are the pins of 24C02 IC.

A0-A2: Pins 1-3 are the address pins. Since multiple 24C02 and other similar devices can be connected to a system, they require addressing. These devices are hard wire addressed i.e. the address pins are permanently grounded and/or connected to Vcc. It is notable that in other two-wire serial EEPROMs from Atmel, all the address pins may not be used.
In this circuit all address pins are grounded, so the device will have an address 000.
WP: Pin7 is the Write Protect pin. When it is kept low (ground), normal read and write operations are allowed. When it is given a high, 24C02 is protected from any write operation.
In the circuit WP pin has been grounded to allow write operation.
Vcc: A 5V DC supply is required to power the AT24C02. This is same as the power supply of the microcontroller. So a separate supply to power 24C02 is not required.
GND: Pin4 is Ground pin (0V)
SDA: Pin5 is serial data pin. The data and control bits are read and write serially from this bidirectional pin.
SCL: Pin6 is serial clock pin. A clock signal is required every time a bit is transferred to or from the SDA pin. A positive edge clock, i.e., a low to high, transfers data to the EEPROM and a negative edge trigger, i.e., a high to low, carries data from the EEPROM.
In the circuit SDA and SCL are connected to bits 0 and 1 of port P1, respectively.

The data pins of the LCD are connected to port 2 of the microcontroller. The RS, RW and enable pins of the LCD are interfaced to bit 0, 1 and 6 of port P3, respectively.

As many 24C02 devices can be used in a system using a two wire serial (I2C) interface. The controller needs to send a device address to select a particular 24C02 device. Also whether a read or write operation is to be done must be specified. This is done by device addressing.
Since 24C02 devices understand 8 bit words the device addresses are also single byte long. The first four MSBs are a fixed sequence of high and low (1010). The next three bits are the device address bits which must match with the hard wire address of the 24C02 device. The LSB specifies whether a write or read operation is to be done. If this bit is high (1), a read operation is initiated; and if it is low (0), write is initiated.

Any read or write operation in 24C02 requires a sequence of interaction with the controller. This involves the following steps:
1.      To set Start condition to initiate any Read or Write operation.
2.      To transfer a bit to/from EEPROM.
3.      A superset of these is used to transfer a word to/ from EEPROM.
4.      To monitor acknowledgements for the receipt or transfer of each word.  
5.      A superset of signals for transferring words perform Read or Write operations.
6.      Setting the Stop condition to terminate the operation.

These steps are explained in more detail in following sections.
Start condition:
Any read or write operation in EEPROM is initiated by Start condition. This occurs when there is a high to low transition of SDA while SCL is high. (Refer the following diagram) This tells the EEPROM that words from the controller are ready for it. SCL is set low at the end of start condition. This is because any read or write operation first involves transfer of some words to EEPROM. That requires a low to high transition of clock corresponding to each bit of the word.

Transfer a bit of a word to/from EEPROM:
First of all, it must be noted that transferring a bit to/from EEPROM is not the same as write/read operation and so they should not be confused with each other. A read or write operation is the whole process that takes place only after a start condition and before stop condition. Transfer of bits to/from an EEPROM is a part of transferring 8 bit word(s) in between the start and stop conditions because every byte is transferred serially bit by bit.
SDA is normally pulled high by the device it is interfaced with. When SCL is high the signal changes (H-L or L-H) at SDA are considered as start or stop condition. A low to high transition at SCL transfers a bit to the EEPROM, i.e., at a low to high transition of SCL, SDA pin of EEPROM behaves as input for bits of word(s). If the data changes when the SCL is high, it will be misinterpreted as start or stop condition.

At high to low transition of SCL a bit is transferred from the EEPROM i.e. the SDA pin behaves as output for bits of word(s) or acknowledgement at high to low transition of the SCL. When SCL is low again the data change is valid, i.e., when bits of a word are to be read or write, they are differentiated by the low of the SCL.

Transfer of a word to/from EEPROM

By sending or receiving eight bits, a complete word is sent to or received by the EEPROM. When sending a word, the acknowledgement from the EEPROM must be checked. There should a clock (high to low transition from an initial low) between two words.

Monitoring acknowledgement bit:
When a word is sent to the EEPROM, it sends back a zero (0) to tell the controller that the word has been received successfully by it. The controller reads this acknowledgement bit by sending a high to low transition at SCL. Acknowledgement bit must be checked every time a word is sent to the EEPROM.

Read/ Write operations:
A sequential transfer of words from/to the EEPROM constitutes the read/write. Thus any read or write operation supported by the EEPROM can be accomplished by sending and/or receiving a sequence of words to/from the EEPROM. There is a fixed set of words which need to be sent to and/or received by the EEPROM corresponding to each read and write operation.

Stop condition:
A stop condition is provided to terminate a read or write operation. A low to high transition of SDA when SCL is high sets the stop condition.

Memory Addressing in 24C02:
In 24C02, the 8 bit words are arranged in 32 pages of 8 bytes each. The word/page address should be sent to the EEPROM to identify the location of memory to be read or written. The word location is specified by three bits since the total number of available words/bytes is 8 (23). Similarly, the page location is given by five bits since the total number of available pages is 32 (25). The lower three bits (D0-D2) of the word address identify the word location in a page, while the higher five bytes (D3-D7) identify the page location.

When a sequence of words is transferred to EEPROM, a clock is needed to be sent by the controller after transmission of each word. This is required so that the controller can receive its acknowledgement. Clock is just a high transition followed by a low transition of SCL when the initial clock signal is low.

Byte Write Operation:
The Byte Write operation programs a single byte of the EEPROM memory. It involves following sequences of instructions to be sent to the EEPROM by the microcontroller:
1.      Set start condition                           
2.      Send device address byte (specify write operation)
3.      Clock
4.      Send word address
5.      Clock
6.      Send data byte
7.      Clock
8.      Set stop condition
9.      Clock

Random read Operation:
The random read operation reads the data from a word address clocked in by the microcontroller. Any random location can be read by this operation. This involves the following sequence of instructions to be sent to/from the EEPROM by/to the controller.
1.      Set start condition
2.      Send device address byte (specify write operation)
3.      Clock
4.      Send word address
5.      Clock
6.      Set start condition
7.      Send device address byte (specify read operation)
8.      Clock
9.      Read data byte
10.  Clock
11.  Stop condition


Circuit Diagram



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