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Collabora adding HEVC/H.265 support to NXP’s i.MX 8M

February 23, 2021 By Michelle Froese

Collabora has been working on the VeriSilicon’s Hantro Codec, a video IP is present on a several popular SoCs (Rockchip, i.MX8, Microchip). It’s been marketed as a small, power-efficient device but it also has a feature that makes it attractive to open-source developers — it’s a stateless accelerator.

Stateless devices do not need firmware to operate, making them more robust and better suited for open-source platforms where it’s preferable to have full control over the system. In this case, the support is split in two:

1. A kernel driver, which is provided by a Video4Linux2 Hantro driver
2. A user-space component, which can be provided by frameworks such as GStreamer and FFMPEG

Collabora’s recent work on the Hantro kernel driver have resulted in the addition of H.264 decoding support and multiple performance improvements. Continuing this work, the company is now introducing High-efficiency Video Coding (HEVC), also known as H.265, decoding support on NXP’s i.MX8 M chipset.

Unlike the currently supported codecs (JPEG, MPEG-2, VP8 and H.264), HEVC does not rely on the G1 hardware block but on the second video processor unit: the G2.

For this first step, the driver supports the basic HEVC features up to level 5.1. Enhance features like 10-bits depth per sample with 4:2:0 chroma sampling, scaling or tile decoding could be added later. Another possible evolution is to take benefit of the hardware capability to use compressed buffers to limit the memory bandwidth consumption.

Supporting HEVC on the Hantro driver will help mature the HEVC V4L2 stateless API enough to be able to remove it from the staging directory. Getting HEVC as a stable API is an important requirement for the user-land stacks that are relying on it.

More work is in the pipeline in the kernel side and in GStreamer, to improve CODEC support. For instance, Collabora is also working on VP9 decoding and V4L2 hardware accelerated encoding.

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