
Catapult AI NN combines hls4ml, an open-source package for machine learning hardware acceleration, and Siemens’ Catapult HLS software for High-Level Synthesis. Developed in close collaboration with Fermilab, a U.S. Department of Energy Laboratory, and other leading contributors to hls4ml, Catapult AI NN addresses the requirements of machine learning accelerator design for power, performance, and area on custom silicon.
As runtime AI and machine learning tasks migrate from the data center into various devices, there is a growing requirement for “right-sized” AI hardware to minimize power consumption, lower cost, and maximize end-product differentiation. However, most machine learning experts are more comfortable working with tools such as TensorFlow, PyTorch or Keras, rather than synthesizable C++, Verilog or VHDL. There has traditionally been no easy path for AI experts to accelerate their machine learning applications in a right-sized ASIC or SoC implementation.
The hls4ml initiative helps bridge this gap by generating C++ from a neural network described in AI frameworks such as TensorFlow, PyTorch or Keras. The C++ can then be deployed for an FPGA, ASIC or SoC implementation.
Catapult AI NN extends the capabilities of hls4ml to ASIC and SoC design. It includes a dedicated library of specialized C++ machine learning functions tailored to ASIC design. Using these functions, designers can optimize PPA by making latency and resource trade-offs across alternative implementations from the C++ code. Designers can now evaluate the impact of different neural net designs to determine the best neural network structure for hardware.
Catapult AI NN is available for early adopters now and will be available to all users in the fourth quarter of 2024.
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