Until the 12.5Gbps CoaXPress 2.0 interface standard was ratified last year, machine-vision image-capture solutions had replaced conveyor belts as the primary roadblock to achieving faster production-line throughput.
Now, Microchip Technology has taken the next step toward realizing the full potential of CoaXPress (CXP) on the factory floor with the first single-chip physical-layer interface devices to include features that:
- Streamline machine vision system design
- Maximize transmission speed
- Simplify deployment in high-volume bottling operations, food inspection, industrial inspection, and imaging applications
“We have worked with the Japan Industrial Imaging Association (JIIA) standards organization and our lead customers to optimize our offering in conjunction with CXP so it fully exploits the specification’s benefits on the factory floor,” said Matthias Kaestner, VP, Automotive Infotainment Systems business unit. “Our low-latency, low-power transmission solutions integrate an equalizer, cable driver and clock data recovery into a single chip that enables camera and capture card manufacturers to deliver high-speed, high-resolution video and control signaling, along with power over a single coax cable.”
Microchip’s EQCO125X40 family of CoaXPress devices are the first to implement the CXP 2.0 standard, starting from a new backward-compatible design based on the specification, with an integrated clock data recovery (CDR) at all speed levels and a camera-side clock to support the demands of real-world environments. These devices significantly increase machine-vision processing throughput by enabling cameras and capture cards to transmit four to eight times faster than alternative solutions. In addition, these devices enable four times the cable/link distance with much lower power and near-zero latency.
The product family also increases design tolerances and flexibility by seamlessly locking on all frequencies at any speed, from CXP-1 to CXP-12, and eliminates the need for multiple channels by supporting 12.5Gbps of bandwidth over a single cable. Broader cabling options ensure systems can be installed where needed and the integrated CDR improves jitter performance for the signal sent from the camera to the capture card.
The on-camera low-frequency clock recovery eliminates the need to program a separate clock in the FPGA. The integrated link signal integrity testing enables the system to perform real-time checks of cable link integrity before and during operations.
For card-makers, Microchip’s new offering makes it easier and less expensive to develop more robust products that customers can deploy wherever they need them on the production line. The products enable pre-setup and real-time cable link quality tests to be performed, giving users more robust and comprehensive solutions to their challenges. They also have the option to scale up to 50 Gbps over multiple cables.
“Microchip’s new CXP-12 family provides our latest products with a compact and low component count single-chip equalizer solution which can therefore easily meet the CoaXPress return loss specification,” said Chris Beynon, CTO with Active Silicon. “The devices also have an elegant feature to allow real-time cable margin testing to detect aging or worn cables before any bit errors would be seen in normal operation.”
Microchip’s CXP devices enable manufacturers to get the same throughput from two ports on cameras and frame grabbers as they previously could with four. The devices can be used to retrieve a real-time low-frequency clock at the camera side, which provides more accurate signal timing.
The manufacturers can also use it as a cable repeater, further extending the distances over which the cameras can be linked. Their low power consumption makes them ideal for bringing to market smaller, better-performing image-capture solutions that increase customer value yet are simpler and less costly to design.
“With Microchip’s CXP devices, we support our market needs for a doubling in data throughput while keeping the same system costs,” said Andre Jacobs, director of marketing and sales with Adimec.
“JIIA is excited to see that Microchip is bringing low-power, high-performance CoaXPress 2.0 solutions to market that fully comply with the recently released CoaXPress 2.0 specification,” said Sachio Kiura, chairman of the Japan Industrial Imaging Association.
In addition to providing key capabilities that Microchip believes will help to accelerate the adoption of better-performing, lower-cost machine-vision solutions in industrial inspection applications, the company expects that its CoaXPress 2.0 family will have an equally transformational effect on applications including traffic monitoring, surveillance and security, medical inspection systems and embedded vision solutions.
The family is part of an extensive product portfolio spanning the requirements for creating total system solutions, including Microchip’s 12Gbps PolarFire field-programmable gate arrays (FPGAs) that seamlessly support the CoaXPress protocol with minimal developer effort while enabling a low-power, low-latency and small-footprint solution.