This is the article to introduce the RTC (Real Time Clock) programming of ARM Cortex-M3 LPC1768 Microcontroller. Here we are going to set the recent time and date in the RTC registers and retrieve it to display on LCD. For setting up the Environment for the development of ARM cortex M3 refer this article.
The LPC 1768 is ARM Cortex- M3 based Microcontrollers for embedded application features in low power consumption and a high level of integration. The ARM Cortex M3 is designed in a such way to enhance debug features and a higher level of system integration. It clocks at a CPU frequency of 100 MHz, and incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses for third bus peripherals. The ARM Cortex- M3 CPU have an internal pre-fetch unit to support speculative branching. The peripheral components include 512KB of flash memory, 64kb of data memory, Ethernet MAC, USB OTG, 4 UART’s, 8-channel general purpose DMA controller, 2 SSP Controllers, 10-bit DAC, Quadrature encoder interface, SPI interface, 3 I2C bus interface, 2 input plus 2 outputs I2S bus interface, 4 general purpose timers, ultra-low power Real-Time Clock (RTC) with separate battery supply, and up to 70 general purpose I/O pins, 6-output general purpose PWM. The LPC1768/66/65/64 are pin-compatible with the 100-pin LPC236x ARM7-based Microcontroller series.
Fig. 1: RTC Programming In LPC1768 Prototype
ARM Cortex M3 (LPC1768) has an inbuilt RTC-Real Time Clock. It includes 20 bytes of registers which are battery powered, which can also be used to store the system status when the power goes off. A 3 V lithium button cell is capable of running the RTC till the voltage drops as 2.1 V. An Interrupt from the RTC can wake up the CPU from any power saving mode.
POWERING THE TIMERS:
Conservation of power is the major concern in the LPC1768. Each peripheral has to turn ON before utilizing it. RESET makes some peripherals to enable while others are disabled. Here the RTC on RESET will be always enabled.
Bit |
Symbol |
Description |
Reset value |
0 |
– |
Reserved. |
NA |
1 |
PCTIM0 |
Timer/Counter 0 power/clock control bit. |
1 |
2 |
PCTIM1 |
Timer/Counter 1 power/clock control bit. |
1 |
`3 |
PCUART0 |
UART0 power/clock control bit. |
1 |
4 |
PCUART1 |
UART1 power/clock control bit. |
1 |
5 |
– |
Reserved. |
NA |
6 |
PCPWM1 |
PWM1 power/clock control bit. |
1 |
7 |
PCI2C0 |
The I2C0 interface power/clock control bit. |
1 |
8 |
PCSPI |
The SPI interface power/clock control bit. |
1 |
9 |
PCRTC |
The RTC power/clock control bit. |
1 |
10 |
PCSSP1 |
The SSP 1 interface power/clock control bit. |
1 |
11 |
– |
Reserved. |
NA |
12 |
PCADC |
A/D converter (ADC) power/clock control bit. |
0 |
13 |
PCCAN1 |
CAN Controller 1 power/clock control bit. |
0 |
14 |
PCCAN2 |
CAN Controller 2 power/clock control bit. |
0 |
15 |
PCGPIO |
Power/clock control bit for IOCON, GPIO, and GPIO interrupts. |
1 |
16 |
PCRIT |
Repetitive Interrupt Timer power/clock control bit. |
0 |
17 |
PCMCPWM |
Motor Control PWM |
0 |
18 |
PCQEI |
Quadrature Encoder Interface power/clock control bit. |
0 |
19 |
PCI2C1 |
The I2C1 interface power/clock control bit. |
1 |
20 |
– |
Reserved. |
NA |
21 |
PCSSP0 |
The SSP0 interface power/clock control bit. |
1 |
22 |
PCTIM2 |
Timer 2 power/clock control bit. |
0 |
23 |
PCTIM3 |
Timer 3 power/clock control bit. |
0 |
24 |
PCUART2 |
UART 2 power/clock control bit. |
0 |
25 |
PCUART3 |
UART 3 power/clock control bit. |
0 |
26 |
PCI2C2 |
I2C interface 2 power/clock control bit. |
1 |
27 |
PCI2S |
I2S interface power/clock control bit. |
0 |
28 |
– |
Reserved. |
NA |
29 |
PCGPDMA |
GPDMA function power/clock control bit. |
0 |
30 |
PCENET |
Ethernet block power/clock control bit. |
0 |
31 |
PCUSB |
USB interface power/clock control bit. |
0 |
Fig. 2: Bit Values Of Power Control Registers In LPC1768
Code Snippet:
/* Enable CLOCK into RTC */
LPC_SC->PCONP |= (1 << 9);
SELECTING CLOCK FOR RTC:
The RTC uses the 1 Hz clock output from the RTC oscillator as the only clock source. The peripheral clock rate for accessing registers is CCLK/8.
RTC INTERRUPTS:
Interrupt Location Register (ILR), Counter Increment Interrupt Register (CIIR) and the Alarm Mask Register (AMR) controls the interrupt generation of RTC. Each bit in CIIR corresponds to one of the time counters. The alarm register allow the user to specify a date or a time at which the interrupt has to be generated, AMR also provides masking mechanism in their registers, this interrupt can wake the microcontroller out of Power-down mode when the RTC is operating from its own oscillator and Battery.
RTC REGISTERS:
The RTC block of LPC1768 has a number of registers, here we will concentrate and discuss about the important registers.
-
CCR- Clock Control Register
-
Consolidated Time Registers:
-
CTIME 0- Consolidated Time Register 0
-
CTIME 1- Consolidated Time Register 1
-
CTIME 2- Consolidated Time Register 2
-
Time Counter Registers:
-
SEC- Seconds Counter
-
MIN- Minutes Register
-
HOUR- Hours Register
-
DOM- Day of Month Register
-
DOW- Day of Week Register
-
DOY- Day of Year Register
-
MONTH- Months Register
-
YEAR- Years Register
-
CALIBRATION- Calibration value Register
RTC REGISTERS AND RTC OPERATION:
The section below will explain the Registers associated with RTC.
CCR ( Clock Control Register ):
The Clock Control Register register controls the operation of the clock divide circuit.
Bit |
Symbol |
Description |
Reset Value |
0 |
CLKEN |
This bit is written with one to enable time counters and written with zero to disable time counters. |
NC |
1 |
CTCRST |
When this bit is set to one, the internal oscillator divider are reset. |
0 |
3:2 |
– |
Internal test mode controls. These bits must be 0 for normal RTC operation. |
NC |
4 |
CCALEN |
To disable calibration counter and reset it to zero, write one to this bit. When written zero, the counter is enabled and starts counting |
NC |
31:5 |
– |
Reserved, user software should not write ones to reserved bits. |
NA |
Fig. 3: CCR Bits And Description In LPC1768 To Control Clock Divide Circuit
Time Counter Register:
The time value consists of the eight counters and there is a separate register associated with each counter. To update the RTC, new values should be written to these registers.
Register |
Description |
Minimum Value |
Maximum Value |
SEC |
Seconds value |
0 |
59 |
MIN |
Minutes value |
0 |
59 |
HOUR |
Hours value |
0 |
23 |
DOM |
Day of Month value |
1 |
28,29,30 or 31 |
DOW |
Day of Week value |
0 |
6 |
DOY |
Day of Year value |
1 |
365 (366 for Leap Year) |
MONTH |
Month value |
1 |
12 |
YEAR |
Year value |
0 |
4095 |
Fig. 4: Time Counter Register In LPC1768 To Update RTC
Consolidated Time Registers
The values of the Time Counters can optionally be read in a consolidated format which allows the programmer to read all time counters with only three read operations.
There are 3 Consolidated Time Registers. The minimum and maximum values of the various fields in these registers are same as the respective Time Counter Register.
These registers are read only. New values should be written to Time Counter Registers.
Consolidated Time Register 0 ( CTIME0 )
Bit |
Symbol |
Description |
Reset Value |
5:0 |
Second |
Seconds value in the range of 0 to 59 |
NC |
7:6 |
Reserved |
Reserved, user software should not write ones to reserved bits. |
NA |
13:8 |
Minute |
Minutes value in the range of 0 to 59 |
NC |
15:14 |
Reserved |
Reserved, user software should not write ones to reserved bits. |
NA |
20:16 |
Hours |
Hours value in the range of 0 to 23 |
NC |
23:21 |
Reserved |
Reserved, user software should not write ones to reserved bits. |
NA |
26:24 |
Day of Week |
Day of week value in the range of 0 to 6 |
NC |
31:27 |
Reserved |
Reserved, user software should not write ones to reserved bits. |
NA |
Fig. 5: Bit Address Of Consolidated Time Register 0 In LPC1768
Consolidated Time Register 1 ( CTIME1 )
Bit |
Symbol |
Description |
Reset Value |
4:0 |
Day of Month |
Day of month value in the range of 1 to 28, 29, 30, or 31 (depending on the month and whether it is a leap year). |
NC |
7:5 |
Reserved |
Reserved, user software should not write ones to reserved bits. |
NA |
11:8 |
Month |
Month value in the range of 1 to 12 |
NC |
15:12 |
Reserved |
Reserved, user software should not write ones to reserved bits. |
NA |
27:16 |
Year |
Year value in the range of 0 to 4095. |
NC |
31:27 |
Reserved |
Reserved, user software should not write ones to reserved bits. |
NA |
Fig. 6: Bit Address Of Consolidated Time Register 1 In LPC1768
Consolidated Time Register 2 ( CTIME2 )
Bit |
Symbol |
Description |
Reset Value |
11:0 |
Day of year |
Day of year value in the range of 1 to 365 (366 for leap years) |
NC |
31:12 |
Reserved |
Reserved, user software should not write ones to reserved bits. |
NA |
Fig. 7: Bit Address Of Consolidated Time Register 2 In LPC1768
Create a project using Keil uvision4 for LPC1768 Microcontroller:
In this section, we will start creating a project in Keil MDK we have already installed Keil µVision and Co-MDK Plug-in + CoLinkEx Drivers required for the CoLinkEx programming adapter. You can start by downloading the project files and kick start your practical experiment.
Code Description:
Separate functions are used to set the time and read the time. The function to set time is
RTCSetTime( local_time ); where local_time is the structure consists of members holding date and time values.
To read the time from RTC the below function is used
current_time = RTCGetTime(); /* Read Time */
Individual members can be accessed and stored in variables by the code below.
hour = current_time.RTC_Hour;
min = current_time.RTC_Min;
sec = current_time.RTC_Sec;
For Display in LCD the following lines are used
LCD_GoToLine(0); /* Go to First line of 2×16 LCD */
LCD_Printf(“Time: %2d:%2d:%2d”,hour,min,sec);
LCD_GoToLine(1); /* Go to Second line of 2×16 LCD */
LCD_Printf(“Date: %2d/%2d/%4u”,date,month,year);
For more details on interfacing the LCD in 4 bit mode with LPC1768 refer this link.
Project Source Code
###The codes are linked in Description ###
Circuit Diagrams
Project Components
Project Video
Filed Under: ARM
Filed Under: ARM
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