Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial.

In the previous tutorial, VHDL Tutorial – 7, we learned how to build different gates (such as AND, OR, NOR, NOT, etc.) by using the NAND gate in VHDL — proving that the NAND gate is universal.

In this tutorial, we will learn how to:

• Write a VHDL program to build all other gates (AND, OR, NOT, XOR, NOR, etc.) by only using the NOR gates.
• Verify the output waveform of the program (digital circuit) with the truth table of the AND, OR, NOT, XOR, or NOR gates.

Truth table

To summarize, we’ll write a VHDL program, compile and simulate it, and get the output in a waveform. We’ll also verify the output waveforms with the given truth table.

First, it’s important to review the step-by-step procedure provided in VHDL Tutorial – 3. In that tutorial, we learn how to design a project, edit and compile a program, create a waveform file, simulate the program, and generate the final output waveforms.

VHDL program

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity nor_uni_gate is
    Port ( a,b : in std_logic;
           y_not,y_and,y_or,y_xnor,y_nand: out std_logic
           );
end nor_uni_gate;

architecture nor_uni_gate_arch of nor_uni_gate is

begin
   y_not <= a nor a;
   y_and <= (a nor a) nor (b nor b);
   y_nand <= ((a nor a) nor (b nor b)) nor ((a nor a) nor (b nor b));
   y_or <= (a nor b) nor (a nor b);
   y_xnor <= (b nor (a nor a)) nor (a nor (b nor b));
end nor_uni_gate_arch;

Note:

• “entity” describes the input-output connections of the digital circuit. As per the circuit given above, we only have two inputs (‘A’ and ‘B’) and five outputs for the five circuits of the different gates built using the NAND gate. 
• “architecture” describes the operation of the circuit, which refers to how the output is generated from the given input. 

To refresh your memory about how this works, go through the first two VHDL tutorials (1 and 2) of this series.

Next, compile the above program, creating a waveform file with all of the necessary inputs and outputs that are listed, and simulate the project. 

Here are the results…

Simulation waveform

From the output waveform, it’s easy to see that the output of the different gate circuits (built using only the NOR gates) is the same as the output of a particular gate.  

That means we can design all of the other gates by using only the NOR gate — meaning, the NOR gate is a universal gate. 

In the next tutorial, we’ll design a digital circuit from a given Boolean equation in VHDL. 

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Filed Under: Featured Contributions, Tutorials, VHDL, VHDL

 

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