What is VHDL? VHDL is a short form of VHSlC Hardware Description Language where VHSIC stands for Very High Speed Integrated Circuits It’s a hardware description language – means it describes the behavior of a digital circuit, and also it can be used to derive or implement a digital circuit/system hardware It can be used…

## VHDL Tutorial 2: VHDL programs

In the previous tutorial on the basics of VHSlC Hardware Description Language or VHDL, we discussed the VHDL design flow and program structure. Now, it’s time to learn about the VHDL programs. However, please note, the prerequisite for VHDL programming are the fundamentals of digital electronics and digital circuit design. To fully understand these programs,…

## VHDL Tutorial – 22: Designing a 1-bit & an 8-bit comparator by using VHDL

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In the previous tutorial, VHDL Tutorial – 21, we designed an 8-bit, full-adder circuit by using VHDL. In this tutorial, we will: Write a VHDL program that builds a 1-bit and an 8-bit comparator circuit Verify the output waveform of the…

## VHDL Tutorial – 21: Designing an 8-bit, full-adder circuit using VHDL

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In the previous tutorial, VHDL Tutorial – 20, we learned how to design 4-bit binary-to-gray & gray-to-binary code converters by using VHDL. In this tutorial, we will: Write a VHDL program that builds an 8-bit, full-adder circuit Verify the output…

## VHDL Tutorial 3: Using MAX+II to compile, simulate & verify a VHDL program

In the previous two tutorials, we learned about VHDL basics and programs. Next, we’ll simulate and verify the VHDL programs. To edit, compile, execute (simulate), or verify a VHDL program, there are requirements including software tools, such as: ISE from XILINX ModelSim from Mentor Graphics Riviera from Aldec Quartus-II from Altera etc. All of these…

## VHDL Tutorial – 4: design, simulate and verify all digital GATE (AND, OR, NOT, NAND, NOR, XOR & XNOR) in VHDL

In previous tutorial VHDL tutorial 3, we have learned how to design, simulate, and verify any digital circuit in VHDL using Altera’s MAX+II VHDL simulator software. (If you are not following this VHDL tutorial series one by one, you are requested to go through all previous tutorials of these series before going ahead in this…

## VHDL Tutorial – 5: Design, simulate and verify NAND, NOR, XOR and XNOR gates using AND-OR-NOT gates in VHDL

In the previous VHDL tutorial 4, we designed and simulated all seven logic gates (AND, OR, NOT, NAND, NOR, XOR, and XNOR) in VHDL. (If you are not following this VHDL tutorial series one by one, please go through all previous tutorials of these series before going ahead in this tutorial) In this tutorial, We…

## VHDL Tutorial 6: Design and verify De Morgan’s Theorem using VHDL

In previous tutorial VHDL tutorial 5, we built NAND, NOR, XOR, and XNOR gates using AND-OR-NOT gates in VHDL. (If you are not following this VHDL tutorial series one by one, please go through all previous tutorials of these series before going ahead in this tutorial) In this tutorial, We shall write a VHDL program…

## VHDL Tutorial – 20: Designing 4-bit binary-to-gray & gray-to-binary code converters

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In the previous tutorial, VHDL Tutorial – 19, we designed a 4-bit binary counter using VHDL. In this tutorial, we will: Write a VHDL program to build a 4-bit binary to gray, and gray to the binary code converter Verify…

## VHDL Tutorial – 19: Designing a 4-bit binary counter using VHDL

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In the previous tutorial, VHDL – 18, we designed a T-flip flop using VHDL. For this project, we will: Write a VHDL program a VHDL program to build a 4-bit binary counter Verify the output waveform of the program (the…

## VHDL Tutorial 18: Design a T flip-flop (with enable and an active high reset input) using VHDL

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In previous tutorial, VHDL tutorial – 17, we designed a JK flip-flop circuit by using VHDL. For this project, we will: Write a VHDL program to build the T flip-flop circuit Verify the output waveform of the program (the digital…

## VHDL Tutorial 17: Design a JK flip-flop (with preset and clear) using VHDL

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In the previous tutorial – VHDL tutorial 16 – we designed a D flip-flop circuit by using VHDL. For this project, we will: Write a VHDL program to build a JK flip-flop circuit Verify the output waveform of the program…

## VHDL Tutorial 16: Design a D flip-flop using VHDL

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In the previous tutorial, we designed a clocked SR latch circuits using VHDL (which is a very high-speed integrated circuit hardware description language). For this project, we will: Write a VHDL program to build a D flip-flop circuit Verify the…

## VHDL Tutorial 15: Design a clocked SR latch (flip-flop) using VHDL

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In the previous tutorial, VHDL tutorial – 14, we designed two circuits using VHDL: a 1×8 de-multiplexer and a 8×1 multiplexer. In this project, we will, Write a VHDL program to build a clocked SR Latch (flip-flop) circuit Verify the…

## VHDL Tutorial 14: Design 1×8 demultiplexer and 8×1 multiplexer using VHDL

In the previous tutorial VHDL tutorial, we designed 8×3 encoder and 3×8 decoder circuits using VHDL. (If you are not following this VHDL tutorial series one by one, you are requested to go through all previous tutorials of these series before going ahead in this tutorial) In this tutorial, We shall write a VHDL program…

## VHDL tutorial 13: Design 3×8 decoder and 8×3 encoder using VHDL

In the previous tutorial VHDL tutorial, we designed an 8-bit parity generator and 8-bit parity checker circuits using VHDL. (If you are not following this VHDL tutorial series one by one, you are requested to go through all previous tutorials of these series before going ahead in this tutorial) In this tutorial, We shall write…

## VHDL Tutorial – 12: Designing an 8-bit parity generator and checker circuits

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In the previous tutorial VHDL tutorial – 11, we learned how to design half and full-subtractor circuits by using the VHDL. In this tutorial, we will: Write a VHDL program to build an 8-bit parity generator and checker circuits Verify…

## VHDL Tutorial – 11: Designing half and full-subtractor circuits

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In previous tutorial VHDL tutorial – 10, we had designed half and full-adder circuits using VHDL. In this tutorial, we will: Write a VHDL program to build half and full-subtractor circuits Verify the output waveform of program (digital circuit) with…

## VHDL Tutorial – 10: Designing half and full-adder circuits

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In the previous tutorial VHDL Tutorial – 9, we learned how to build digital circuits from given Boolean equations. In this tutorial, we will: Write a VHDL program to build half and full-adder circuits. Verify the output waveform of the…

## VHDL Tutorial – 9: Digital circuit design with a given Boolean equation

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In previous tutorials VHDL tutorial – 8, we learned how to build different gates (such as AND, OR, NOR, NOT, etc.) by only using the NOR gate in VHDL. We were able to successfully prove that he NOR gate is…