In the previous tutorial VHDL tutorial, we designed 8×3 encoder and 3×8 decoder circuits using VHDL. (If you are not following this VHDL tutorial series one by one, you are requested to go through all previous tutorials of these series before going ahead in this tutorial) In this tutorial, We shall write a VHDL program…

## VHDL tutorial 13: Design 3×8 decoder and 8×3 encoder using VHDL

In the previous tutorial VHDL tutorial, we designed an 8-bit parity generator and 8-bit parity checker circuits using VHDL. (If you are not following this VHDL tutorial series one by one, you are requested to go through all previous tutorials of these series before going ahead in this tutorial) In this tutorial, We shall write…

## VHDL Tutorial – 12: Designing an 8-bit parity generator and checker circuits

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In the previous tutorial VHDL tutorial – 11, we learned how to design half and full-subtractor circuits by using the VHDL. In this tutorial, we will: Write a VHDL program to build an 8-bit parity generator and checker circuits Verify…

## VHDL Tutorial – 11: Designing half and full-subtractor circuits

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In previous tutorial VHDL tutorial – 10, we had designed half and full-adder circuits using VHDL. In this tutorial, we will: Write a VHDL program to build half and full-subtractor circuits Verify the output waveform of program (digital circuit) with…

## VHDL Tutorial – 10: Designing half and full-adder circuits

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In the previous tutorial VHDL Tutorial – 9, we learned how to build digital circuits from given Boolean equations. In this tutorial, we will: Write a VHDL program to build half and full-adder circuits. Verify the output waveform of the…

## VHDL Tutorial – 9: Digital circuit design with a given Boolean equation

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In previous tutorials VHDL tutorial – 8, we learned how to build different gates (such as AND, OR, NOR, NOT, etc.) by only using the NOR gate in VHDL. We were able to successfully prove that he NOR gate is…

## VHDL Tutorial – 8: NOR gate as a universal gate

Note: it’s recommended to follow this VHDL tutorial series in order, starting with the first tutorial. In the previous tutorial, VHDL Tutorial – 7, we learned how to build different gates (such as AND, OR, NOR, NOT, etc.) by using the NAND gate in VHDL — proving that the NAND gate is universal. In this…

## VHDL Tutorial – 7 NAND gate as universal gate using VHDL

In previous tutorials VHDL tutorial (#6), we built a circuit for D Morgan’s Theorems in VHDL and verified its output to prove D Morgan’s theorems. (If you are not following this VHDL tutorial series one by one, you are requested to go through all previous tutorials of these series before going ahead in this tutorial)…

## VHDL Tutorial 6: Design and verify De Morgan’s Theorem using VHDL

In previous tutorial VHDL tutorial 5, we built NAND, NOR, XOR, and XNOR gates using AND-OR-NOT gates in VHDL. (If you are not following this VHDL tutorial series one by one, please go through all previous tutorials of these series before going ahead in this tutorial) In this tutorial, We shall write a VHDL program…

## VHDL Tutorial – 5: Design, simulate and verify NAND, NOR, XOR and XNOR gates using AND-OR-NOT gates in VHDL

In the previous VHDL tutorial 4, we designed and simulated all seven logic gates (AND, OR, NOT, NAND, NOR, XOR, and XNOR) in VHDL. (If you are not following this VHDL tutorial series one by one, please go through all previous tutorials of these series before going ahead in this tutorial) In this tutorial, We…

## VHDL Tutorial – 4: design, simulate and verify all digital GATE (AND, OR, NOT, NAND, NOR, XOR & XNOR) in VHDL

In previous tutorial VHDL tutorial 3, we have learned how to design, simulate, and verify any digital circuit in VHDL using Altera’s MAX+II VHDL simulator software. (If you are not following this VHDL tutorial series one by one, you are requested to go through all previous tutorials of these series before going ahead in this…

## VHDL Tutorial 3: Using MAX+II to compile, simulate & verify a VHDL program

In the previous two tutorials, we learned about VHDL basics and programs. Next, we’ll simulate and verify the VHDL programs. To edit, compile, execute (simulate), or verify a VHDL program, there are requirements including software tools, such as: ISE from XILINX ModelSim from Mentor Graphics Riviera from Aldec Quartus-II from Altera etc. All of these…

## VHDL Tutorial 2: VHDL programs

In the previous tutorial on the basics of VHSlC Hardware Description Language or VHDL, we discussed the VHDL design flow and program structure. Now, it’s time to learn about the VHDL programs. However, please note, the prerequisite for VHDL programming are the fundamentals of digital electronics and digital circuit design. To fully understand these programs,…

## VHDL Tutorial 1: Introduction to VHDL

What is VHDL? VHDL is a short form of VHSlC Hardware Description Language where VHSIC stands for Very High Speed Integrated Circuits It’s a hardware description language – means it describes the behavior of a digital circuit, and also it can be used to derive or implement a digital circuit/system hardware It can be used…

## Decimal counter designed in vhdl

This tutorial is about designing a decimal counter in vhdl. I used xilinx to write code and for simulation i used Isim simulator. The decimal counter i designed starts from 0 and moves up to 999. Counter is working perfectly in simulation. What is Decimal Counter? Decimal counter is same like a stop…

## Melay machine finite state machine design in vhdl

This tutorial is about implementing a finite state machine is vhdl. I will go through each and every step of designing a finite state machine and simulating it. Xilinx is used as a tool to construct finite state machine and for simulation and testing purpose. I suppose you know what is finite state machine and…

## N-bit Ring Counter made using VHDL

A ring counter as the name depicts is a closed loop. Normally in counters their is an increment or decrement in the output depending on if its a up or down counter. In contrast to up and down, ring is some what a fixed counter. Only a specified number of bits revolve around in a…

## Linear-feedback shift register (LFSR) design in vhdl

LFSR stands for linear feedback shift register. Although they are widely used in random electronics projects but they are quiet often neglected by the engineers community. LFSR is comprised of a series of D-flip flops, depending on the size of the LFSR. Some of the states and especially the last one is feed back to the…

## N-bit gray counter using vhdl

This tutorial is about designing an N-bit gray counter in vhdl. I am using xilinx software tool to design and test the gray counter. So what is gray counter? A gray counter changes 1-bit only during one state to another state transition. The counter is same like the normal incremental counter. The only difference is…