In the previous VHDL tutorial 4, we designed and simulated all seven logic gates (AND, OR, NOT, NAND, NOR, XOR, and XNOR) in VHDL.

*(If you are not following this VHDL tutorial series one by one, please go through all previous tutorials of these series before going ahead in this tutorial)*

In this tutorial,

- We shall write a VHDL program to build all NAND, NOR, XOR, and XNOR gates using AND-OR-NOT gates.
- Simulate the program to design a digital circuit of NAND, NOR, XOR, XNOR gates that is build using AND-OR-NOT gates
- Verify the output waveform of the program (digital circuit) with the truth table of these logic GATES

Let us start with the digital circuit for which we shall write a VHDL program.

__Digital Circuit__

The truth table for all the above circuits:

__NAND gate using AND-OR-NOT gate circuit Truth Table
__

__NOR gate using AND-OR-NOT gate circuit Truth Table__

__XOR gate using AND-OR-NOT gate circuit Truth Table__

**Now we shall write a VHDL program, compile it, simulate it, and get the output in the form of a waveform. Finely, we shall verify those output waveforms with the given truth table.**

__XNOR gate using AND-OR-NOT gate circuit Truth Table__

*(Please go through step by step procedure given in VHDL-tutorial 3 to create a project, edit and compile the program, create waveform file, simulate the program, and generate output waveforms.)*

__VHDL Program
__library IEEE;

**use IEEE.STD_LOGIC_1164.ALL;**

**entity gate_ckt is**

** Port (a,b : in std_logic;**

** y_nand,y_nor,y_not,y_xor,y_xnor : out std_logic**

** );**

**end gate_ckt;**

**architecture gate_ckt_arch of gate_ckt is**

** begin**

** y_nand <= not (a and b);**

** y_nor <= not (a or b);**

** y_xor <= (a and not(b)) or (not(a) and b);**

** y_xnor <= (a and b) or (not(a) and not(b));**

**end gate_ckt_arch;**

“*entity*” describes input-output connections of the digital circuit. As per our circuit given above, we have only two inputs ‘A’ and ‘B’ and four outputs for four gates.

“*architecture*” describes the operation of the circuit – means how the output is generated from a given input.

*(To know more and get more details about VHDL program(s) please go through first two tutorials – VHDL tutorial one and VHDL tutorial 2 – of these series)*

Next, compile above program – create a waveform file with all inputs and outputs listed – simulate the project, and you will get the following result:

** Simulation Waveform**Now verify these output waveforms with the truth table of GATEs. For example, here is one case that is highlighted with inputs A=1 and B=0. You can verify the other three cases also.

This is how you can build NAND, NOR, XOR, and XNOR gates using AND-OR-NOT gate in VHDL and verify its output with their truth table.

In the next tutorial, we shall prove D’Morgan’s Theorems by designing their digital circuits using VHDL programming

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